Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

DAC7741YC/2K Scheda tecnica(PDF) 16 Page - Texas Instruments

Il numero della parte DAC7741YC/2K
Spiegazioni elettronici  16-Bit, Single Channel DIGITAL-TO-ANALOG CONVERTER With Internal Reference and Parallel Interface
PDF  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo TI1 - Texas Instruments

DAC7741YC/2K Scheda tecnica(HTML) 16 Page - Texas Instruments

Back Button DAC7741YC/2K Datasheet HTML 12Page - Texas Instruments DAC7741YC/2K Datasheet HTML 13Page - Texas Instruments DAC7741YC/2K Datasheet HTML 14Page - Texas Instruments DAC7741YC/2K Datasheet HTML 15Page - Texas Instruments DAC7741YC/2K Datasheet HTML 16Page - Texas Instruments DAC7741YC/2K Datasheet HTML 17Page - Texas Instruments DAC7741YC/2K Datasheet HTML 18Page - Texas Instruments DAC7741YC/2K Datasheet HTML 19Page - Texas Instruments DAC7741YC/2K Datasheet HTML 20Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 23 page
background image
DAC7741
16
SBAS248B
www.ti.com
FIGURE 8. Offset Adjustment Transfer Characteristic.
OFFSET ADJUSTMENT
Offset adjustment is accomplished by introducing a small
current into the summing junction (SJ) of the DAC7741. The
voltage at SJ, or VSJ, is dependent on the output configura-
tion of the DAC7741. See Table IV for the required pin
strapping for a given configuration and the nominal values of
VSJ for each output range.
REFERENCE
OUTPUT
PIN STRAPPING
VSJ(1)
CONFIGURATION CONFIGURATION ROFFSET
RFB1
RFB2
Internal
0V to +10V
to VREF to VOUT to VOUT
+5V
Reference
–10V to +10V
NC
NC
to VOUT +3.333V
–5V to +5V
to AGND to VOUT to VOUT +1.666V
External
0V to VREF
to VREF to VOUT to VOUT
VREF/2
Reference
–VREF to VREF
NC
NC
to VOUT
VREF/3
–VREF/2 to VREF/2 to AGND to VOUT to VOUT
VREF/6
NOTE: (1) Voltage measured at VSJ for a given configuration.
TABLE IV. Nominal VSJ vs. VOUT and Reference Configuration.
OUTPUT
RPOT2
R1
RS
ISJ
NOMINAL
CONFIGURATION
RANGE
OFFSET
ADJUSTMENT
0V to +10V
10K
0
2.5M
±2µA
±25mV
–10V to +10V
10K
5K
1.5M
±2.2µA
±55mV
–5V to +5V
10K
20K
1M
±1.7µA
±21mV
TABLE V. Recommended External Component Values for
Symmetrical Offset Adjustment (VREF = 10V).
The current level required to adjust the DAC7741 offset can
be created by using a potentiometer divider as shown in
Figure 7. Another alternative is to use a unipolar DAC in
order to apply a voltage, VOADJ, to the resistor RS. A ±2uA
current range applied to SJ will ensure offset adjustment
coverage of the
±0.1% maximum offset specification of the
DAC7741.
When in a unipolar configuration (VSJ = 5V), only a single
resistor, RS, is needed for symmetrical offset adjustment with
a 0V to 10V VOADJ range. When in one of the two bipolar
configurations, VSJ is either +3.333v (±10V range) or +1.666V
(
±5V range), and circuit values chosen to match those given
in Table V will provide symmetrical offset adjust. Please refer
to Figure 7 for component configuration.
OFFSET ADJUST RANGE
–10V to +10V V
OUT
Configuration
min (75% of typ)
min (75% of typ)
typ
typ
50
25
0
–25
–50
–22
0
–11
I
SJ (µA)
0V to 10V and –5V to +5V
V
OUT Configuration
Figure 8 illustrates the typical and minimum offset adjustment
ranges provided by forcing a current at SJ for a given output
voltage configuration.
GAIN ADJUSTMENT
When using the internal reference of the DAC7741, gain
adjustment is performed by adjusting the internal refer-
ence voltage via the reference adjust pin, REFADJ. The
effect of a reference voltage change on the gain of the
DAC output can be seen in the generic equation (for
unipolar configuration):
VOUT = VREFIN • (N/65536)
where N is represented in decimal format and ranges from 0
to 65535.
REFADJ can be driven by a low impedance voltage source
such as a unipolar, 0V to +10V DAC or a potentiometer (less
than 100k
Ω) as shown in Figure 7. Since the input imped-
ance of REFADJ is typically 50k
Ω, the smaller the resistance
of the potentiometer, the more linear the adjustment will be.
A 10k
Ω potentiometer is suggested if linearity of the refer-
ence adjustment is of concern.
REF
OUT ADJUST RANGE
40
30
20
10
0
–10
–20
–30
–40
02
4
6
8
10
REFADJ (V)
Typical REF
OUT
Adjustment Range
Minimum REF
OUT
Adjustment Range
FIGURE 9. Internal Reference Adjustment Transfer Charac-
teristic.
VOLTAGE AT REFADJ
REFOUT VOLTAGE
REFADJ = 0V
10V + 25mV (min)
REFADJ = 5V or NC(1)
10V
REFADJ = 10V
10V – 25mV (max)
NOTE: "NC" is "Not Connected"
TABLE VI. Minimum Internal Reference Adjustment Range.
When the DAC7741 internal reference is not used, gain
adjustments can be made via trimming the external refer-
ence applied to the DAC at REFIN. This can be accomplished
through using a potentiometer, unipolar DAC, or other means
of precision voltage adjustment to control the voltage pre-
sented to the DAC7741 by the external reference. Figure 9
and Table VI summarize the range of adjustment of the
internal reference via REFADJ.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com