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CDCE421RGET Scheda tecnica(PDF) 16 Page - Texas Instruments |
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CDCE421RGET Scheda tecnica(HTML) 16 Page - Texas Instruments |
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16 / 24 page ![]() APPENDIX A: TEST CONFIGURATIONS S0248-01 LVDS LVDS 100 W S0249-01 VCC – 2V LVPECL LVPECL 50 W 50 W S0250-01 LVDS 50 W PhaseNoise Analyzer S0251-01 LVPECL 50 W PhaseNoise Analyzer 150 W 150 W CDCE421 SCAS842B – APRIL 2007 – REVISED JANUARY 2009..................................................................................................................................................... www.ti.com Test setups are used to characterize the CDCE421 device in ac and dc terminations. Figure 8 through Figure 11 illustrate all four setups used to terminate the clock signal driven by the device under test. Figure 8. LVDS DC Termination Test Configuration Figure 9. LVPECL DC Termination Test Configuration Figure 10. LVDS AC Termination Test Configuration Figure 11. LVPECL AC Termination Test Configuration 16 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated Product Folder Link(s): CDCE421 |
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