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DP83907 Scheda tecnica(PDF) 68 Page - National Semiconductor (TI) |
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DP83907 Scheda tecnica(HTML) 68 Page - National Semiconductor (TI) |
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68 / 70 page ![]() Preliminary Switching Design Guidelines (Continued) AUI TRANSMIT TIMING (End of Packet) TLF12082 – 50 Symbol Description Min Max Units tTOh Transmit Output High before Idle (Note 1) 200 ns tTOI Transmit Output Idle Time (Note 1) 8000 ns AUI RECEIVE TIMING (End of Packet) TLF12082 – 51 Symbol Description Min Max Units teop1 Receive End of Packet Hold Time after Logic ‘‘1’’ (Note 1) 225 ns teop0 Receive End of Packet Hold Time after Logic ‘‘0’’ (Note 1) 225 ns Note 1 This parameter is guaranteed by design and is not tested 68 |
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