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DP83910AV Scheda tecnica(PDF) 10 Page - National Semiconductor (TI) |
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DP83910AV Scheda tecnica(HTML) 10 Page - National Semiconductor (TI) |
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10 / 12 page ![]() 90 Switching Characteristics (Continued) Loopback Timing TLF9365 – 9 Loopback Specifications Symbol Parameter Min Max Units tLBs Loopback Setup Time (Note 1) 50 ns tLBh Loopback Hold Time (Note 1) 1000 ns Note 1 This parameter is guaranteed by design and is not tested AC Timing Test Conditions All specifications are valid only if the mandatory isolation is employed and all differential signals are taken to be at the AUI side of the pulse tranformer Input Pulse Levels (TTLCMOS) GND to 30V Input Rise and Fall Times (TTLCMOS) 5 ns Input and Output Reference Levels (TTLCMOS) 13V Input Pulse Levels (Diff) b 350 to b1315 mV Input and Output 50% Point of Reference Levels (Diff) the Differential TLF9365 – 10 FIGURE 3 Capacitance TA e 25 C f e 1 MHz Symbol Parameter Typ Units CIN Input Capacitance 7 pF COUT Output Capacitance 7 pF TLF9365 – 12 FIGURE 4 Note In the above diagram the TXa and TXb signals are taken from the AUI side of the isolation (pulse transformer) The pulse transformer used for all testing is the Pulse Engineering PE64103 10 |
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