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11AA02UIDT-I/TT Scheda tecnica(PDF) 5 Page - Microchip Technology |
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11AA02UIDT-I/TT Scheda tecnica(HTML) 5 Page - Microchip Technology |
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5 / 32 page ![]() 2013 Microchip Technology Inc. DS20005206A-page 5 11AA02UID 2.0 FUNCTIONAL DESCRIPTION 2.1 Principles of Operation The 11AA02UID family of serial EEPROMs support the UNI/O® protocol. They can be interfaced with microcontrollers, including Microchip’s PIC® microcon- trollers, ASICs, or any other device with an available discrete I/O line that can be configured properly to match the UNI/O protocol. The 11AA02UID devices contain an 8-bit instruction register. The devices are accessed via the SCIO pin. Data is embedded into the I/O stream through Manchester encoding. The bus is controlled by a master device which determines the clock period, con- trols the bus access and initiates all operations, while the 11AA02UID works as slave. Both master and slave can operate as transmitter or receiver, but the master device determines which mode is active. FIGURE 2-1: BLOCK DIAGRAM SCIO STATUS Register I/O Control Memory Control Logic X Dec HV Generator EEPROM Array Page Latches Y Decoder Sense Amp. R/W Control Logic VCC VSS Current- Limited Slope Control |
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