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TFP501PZP Scheda tecnica(PDF) 9 Page - Texas Instruments

Il numero della parte TFP501PZP
Spiegazioni elettronici  PanelBus HDCP Digital Receiver
PDF  24 Pages
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo TI1 - Texas Instruments

TFP501PZP Scheda tecnica(HTML) 9 Page - Texas Instruments

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background image
80%
20%
80%
20%
tr(2)
tf(2)
ODCK
80%
80%
20%
20%
tr(1)
tf(1)
QE[23:0], QO[23:0], DE,
CTL[2:1], HSYNC, VSYNC
f(ODCK)
ODCK
tsu(1)
th(1)
tsu(2)
th(2)
VOH
VOL
VOH
VOL
VOH
VOL
VOH
VOL
VOH
VOL
VOH
VOL
ODCK
QE[23:0], QO[23:0], DE,
CTL[2:1], HSYNC, VSYNC
OCK_INV
50%
tsk(D)
Tx+
Tx-
50%
VOH
td(st)
ODCK
QE[23:0]
PD
QE[23:0], QO[23:0],
ODCK, DE, CTL[2:1],
HSYNC, VSYNC, SCDT
td(PDL)
VIL
PDO
QE[23:0], QO[23:0],
ODCK, DE, CTL[2:1],
HSYNC, VSYNC
td(PDOL)
VIL
TFP501
www.ti.com
SLDS127C
– JULY 2001 – REVISED JULY 2011
PARAMETER MEASUREMENT INFORMATION
Figure 1. Rise and Fall Time of ODCK
Figure 2. Rise and Fall Time of Data and Control Signals
Figure 3. ODCK Frequency
Figure 4. Data Setup and Hold Time to Rising and Falling Edge of ODCK
Figure 5. ODCK High to QE[23:0]
Figure 6. Analog Input Intra-Pair
Staggered Data Output
Differential Skew
Figure 7. Delay from PD Low to Hi-Z Outputs
Figure 8. Delay from PDO Low to Hi-Z Outputs
Copyright
© 2001–2011, Texas Instruments Incorporated
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