LP5524 datasheet(5/19 Pages) TI1

5 / 19 page

LP5524

www.ti.com

SNVS500B – JULY 2007 – REVISED JUNE 2016

Product Folder Links: LP5524

Submit Documentation Feedback

(1)

All voltages are with respect to the potential at the GND pin.

(2)

Minimum (MIN) and maximum (MAX) limits are specified by design, test, or statistical analysis. Typical (TYP) numbers represent the

most likely norm.

(3)

Matching is the maximum difference from the average.

(4)

The current source is connected internally between VIN an VDX. The voltage across the current source, (VIN – VDX), is referred to a

headroom voltage (VHR). Minimum headroom voltage is defined as the VHR voltage when the LED current has dropped 20% from the

value measured at VDX = VIN – 1 V.

6.5 Electrical Characteristics

Unless otherwise noted, specifications apply to the Functional Block Diagram with: VIN = 3.6 V, RISET = 32.4 kΩ, CIN = 100 nF,

TJ = 25°C.

(1) (2)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IVIN

Shutdown supply current ENA = ENB = 0 V

0.2

µA

ENA = ENB = 0V, TJ = –40°C to 85°C

Active mode supply

current

ENA = ENB = H, ISET = open

170

µA

ENA = ENB = H, ISET = open

TJ = –40°C to 85°C

210

IDX

Recommended LED

current

IOUT

LED output current

accuracy

IDX = 5 mA, VDX = VIN – 0.2V

ISET = open

0.5%

IDX = 5 mA, VDX = VIN – 0.2V

ISET = open, TJ = –40°C to 85°C

IDX = 15.9 mA, VDX = VIN – 0.2 V

0.5%

IDX = 15.9 mA, VDX = VIN – 0.2 V

TJ = –40°C to 85°C

IMATCH

LED current matching(3)

IDX = 15.9 mA

0.4%

IDX = 15.9 mA, TJ = –40°C to 85°C

2.5%

ΔIDX%/ΔVIN

Line regulation

%/V

ΔIDX%/ΔVDX

Load regulation

VDX < VIN – 0.2V

0.4

%/V

VHR

Minimum headroom

voltage

(VIN – VDX)

(4)

IDX set to 5 mA

IDX set to 15 mA

IDX set to 15 mA, TJ = –40°C to 85°C

IMIRROR

External RISET to LED

current mirroring ratio

1:416

VISET

ISET reference voltage

1.237

IISET

TJ = –40°C to 85°C

2.5

62.5

µA

tPWM MIN

Recommended

minimum

ON time for PWM signal

μs

VIL

Logic input low level

TJ = –40°C to 85°C

0.4

VIH

Logic input high level

TJ = –40°C to 85°C

1.2

IIN

CTRL input current

ENA / ENB = 1.2 V

1.2

µA

ENA / ENB = 1.2 V, TJ = –40°C to 85°C

1.9

tSD

Shutdown delay time

Delay from ENA and ENB = low to

IDX = 0.1 × IDX nom

µs

LP5524 Scheda tecnica(PDF) 5 Page - Texas Instruments

LP5524 Scheda tecnica(HTML) 5 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Scheda tecnica Scarica

Link URL