G=1+

50k

R

G

INA118

SBOS027A – SEPTEMBER 2000 – REVISED JANUARY 2016

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Typical Application (continued)

8.2.1 Design Requirements

Figure 30 and Figure 29 depict the performance of a typical application of the INA118 in a shop floor vibration

sensing application. Because industrial process control systems often involve the interconnecting of multiple

subsystems, ground loops are frequently encountered and often are not easily solved. The inherent common-

mode rejection of instrumentation amplifiers enables accurate measurements even in the presence of ground

loop potentials.

The typical application was tested in a system with these requirements:

•

Transducer signal

≈ 5 mVp-p

•

Transducer center frequency = 1 kHz

•

Common-Mode signal (required to be rejected): 1 Vp-p at 60 Hz

8.2.2 Detailed Design Procedure

8.2.2.1 Setting the Gain

between pins 1 and 8.

(1)

Commonly used gains and resistor values are shown in Figure 26.

The 50-k

chip metal film resistors are laser-trimmed to accurate absolute values. The accuracy and temperature coefficient

of these resistors are included in the gain accuracy and drift specifications of the INA118.

can make wiring resistance important. Sockets add to the wiring resistance, which contributes additional gain

error (possibly an unstable gain error) in gains of approximately 100 or greater.

8.2.2.2 Dynamic Performance

The Figure 1 shows that, despite its low quiescent current, the INA118 achieves wide bandwidth, even at high

gain. This is due to the current-feedback topology of the INA118. Settling time also remains excellent at high

gain.

The INA118 exhibits approximately 3-dB peaking at 500 kHz in unity gain. This is a result of its current-feedback

topology and is not an indication of instability. Unlike an op amp with poor phase margin, the rise in response is a

predictable 6-dB/octave due to a response zero. A simple pole at 300 kHz or lower produces a flat passband

unity gain response.

8.2.2.3 Offset Trimming

The INA118 is laser-trimmed for low offset voltage and drift. Most applications require no external offset

adjustment. Figure 27 shows an optional circuit for trimming the output offset voltage. The voltage applied to the

Ref terminal is summed at the output. The op amp buffer provides low impedance at the Ref terminal to preserve

good common-mode rejection.

14

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