TPS65010 datasheet(2/50 Pages) TI

2 / 50 page

www.ti.com

ABSOLUTE MAXIMUM RATINGS

PACKAGE DISSIPATION RATINGS

(1)

TPS65010

SLVS149A – JUNE 2003 – REVISED JANUARY 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

The serial interface can be used for dynamic voltage scaling, for collecting information on and controlling the

battery charger status, for optionally controlling 2 LED driver outputs, a vibrator driver, masking interrupts, or for

disabling/enabling and setting the LDO output voltages. The interface is compatible with the fast/standard mode

I2C™ specification allowing transfers at up to 400 kHz.

ORDERING INFORMATION

PACKAGE

PART NUMBER(1)

-40

°C to 85°C

7 mm

× 7 mm, 48-pin QFN

TPS65010RGZ

(1)

The RGZ package is available in tape and reel. Add R suffix (TPS65010RGZR) to order quantities of 2500 parts per reel. Add T suffix

(TPS65010RGZT) to order quantities of 250 parts per reel.

over operating free-air temperature range unless otherwise noted(1)

UNIT

Input voltage on VAC pin with respect to AGND

20 V

Input voltage range on all other pins except AGND/PGND pins with respect to AGND

-0.3 V to 7 V

HBM and CBM capabilities at pins VIB, PG, and LED2

1 kV

Current at AC, VBAT, VINMAIN, L1, PGND1

1800 mA

Peak current at all other pins

1000 mA

Continuous power dissipation

See Dissipation Rating Table

Operating free-air temperature, TA

-40

°C to 85°C

Maximum junction temperature, TJ

125

°C

Storage temperature, Tstg

-65

°C to 150°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

260

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

AMBIENT TEMPERATURE

MAX POWER DISSIPATION FOR Tj= 125°C

(2)

DERATING FACTOR ABOVE TA = 55°C

°C

3 W

30 mW/

°C

2.1 W

(1)

The TPS65010 is housed in a 48-pin QFN package with exposed leadframe on the underside. This 7 mm

× 7 mm package exhibits a

thermal impedance (junction-to-ambient) of 33 K/W when mounted on a JEDEC high-k board.

(2)

Consideration needs to be given to the maximum charge current when the assembled application board exhibits a thermal impedance

which differs significantly from the JEDEC high-k board.

TPS65010 Scheda tecnica(PDF) 2 Page - Texas Instruments

TPS65010 Scheda tecnica(HTML) 2 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Scheda tecnica Scarica

Link URL