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ST72561 Scheda tecnica(PDF) 28 Page - STMicroelectronics |
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ST72561 Scheda tecnica(HTML) 28 Page - STMicroelectronics |
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28 / 262 page ![]() ST72561 28/262 SYSTEM INTEGRITY MANAGEMENT (Cont’d) 6.4.3 Low Power Modes 6.4.3.1 Interrupts The AVD interrupt event generates an interrupt if the AVDIE bit is set and the interrupt mask in the CC register is reset (RIM instruction). Mode Description WAIT No effect on SI. AVD interrupts cause the device to exit from Wait mode. HALT The SICSR register is frozen. Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Halt AVD event AVDF AVDIE Yes No |
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