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TLE9832 Scheda tecnica(PDF) 19 Page - Infineon Technologies AG |
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TLE9832 Scheda tecnica(HTML) 19 Page - Infineon Technologies AG |
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19 / 94 page ![]() TLE9832 Functional Description Data Sheet 19 Rev. 1.1, 2012-03-08 3.1 Power Management Unit (PMU) The purpose of the power management unit is to ensure the fail safe behavior of embedded automotive systems. Therefore the power management unit controls all system modes including the corresponding transitions. The power management unit is responsible for generating all required voltage supplies for the embedded MCU (VDDC, VDDP) and the external sensor supply (VDDEXT). Additionally, the PMU provides well defined sequences for the system mode transitions and generates hierarchical reset priorities. The reset priorities control the reset behavior of all system functionalities, especially the reset behavior of the embedded MCU, including the test hardware. All these functions are controlled by finite state machines. The system master functionality of the PMU forces the generation of an independent logic supply (Power Down Supply) and system clock (LP_CLK). Therefore the PMU needs a module internal logic supply and system clock which works independently of the MCU clock. The following state diagram shows the available modes of the device. Figure 4 Power Management Unit System Modes start-up active stop sleep Vs > 3V stop command (from MCU) LIN-wake | MON-wake | GPIO-wake | cyclic _wake | PMU_PIN = 1 | SUP_TMOUT = 1 Sleep command (from MCU) | WDT1_SEQ_FAIL = 1 VDDC =stable & error_supp<5 VDDC = fail error_sup=5 PMU_PIN = 1 | PMU_SOFT = 1 | (PMU_Ext_WDT = 1 & WDT1_SEQ_FAIL= 0) LIN-wake | MON-wake | cyclic _wake PMU_System _Modes _Cus.vsd |
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