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AS6200 Scheda tecnica(PDF) 24 Page - ams AG |
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AS6200 Scheda tecnica(HTML) 24 Page - ams AG |
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24 / 35 page ![]() Page 24 ams Datasheet Document Feedback [v1-01] 2016-Jun-17 AS6200 − Detailed Descriptions Timing Diagrams The following timing diagrams depict the different bus operation modes and data transmission. Figure 32: Timing Diagram for Word Write 1 2 3 4 56 7 8 9 12 3 4 56 7 8 9 SCL SDA 10 01 0 A1 A0 R/W 00 0 0 00 IX1 IX0 Start by master Values are defined by ADD0 pin setting Frame 1: Slave Address Byte Frame 2: Index Register Byte 12 34 5 6 7 8 9 12 34 56 7 8 9 SCL SDA Frame 3: MSB Data Byte Frame 4: LSB Data Byte D7 D6 D5 D4 D3 D2 D1 D0 D6 D5 D4 D3 D2 D1 D7 D0 (Continued) (Continued) Acknowledge by slave Acknowledge by slave Acknowledge by slave Acknowledge by slave Stop by master |
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