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SY58012U Scheda tecnica(PDF) 2 Page - Micrel Semiconductor |
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SY58012U Scheda tecnica(HTML) 2 Page - Micrel Semiconductor |
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2 / 9 page ![]() 2 Precision Edge™ SY58012U Micrel PACKAGE/ORDERING INFORMATION Ordering Information(Note 1) Package Operating Package Part Number Type Range Marking SY58012UMI MLF-16 Industrial 012U SY58012UMITR(Note 2) MLF-16 Industrial 012U Note 1. Contact factory for die availability. Die are guaranteed at TA = 25 °C, DC electricals only. Note 2. Tape and Reel. Pin Number Pin Name Pin Function 1, 4 IN, /IN Differential Input: This input pair is the signal to be buffered. Each pin of this pair internally terminates with 50 Ω to the V T pin. Note that this input will default to an indeterminate state if left open. See “Input Interface Applications” section. 2 VT Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap for each input (IN, /IN) to a termination network for maximum interface flexibility. See “Input Interface Applications” section. 3 VREF-AC Reference Output Voltage: This output biases to VCC –1.4V. It is used when AC-coupling the inputs (IN, /IN). Connect V REF-AC directly to the VT pin. Bypass with 0.01µF low ESR capacitor to VCC. Maximum current source or sink is 0.5mA. See “Input Interface Applications” section. 5, 8, 13, 16 VCC Positive Power Supply: Bypass with 0.1 µF//0.01µF low ESR capacitors as close to the VCC pins as possible. 6, 7, 14, 15 GND, Ground. Exposed pad must be connected to a ground plane that is the same potential Exposed Pad as the ground pin. 12, 11 Q0, /Q0, LVPECL Differential Output Pairs: Differential buffered output copy of the input signal. The 9, 10 Q1, /Q1 output swing is typically 800mV. Unused output pairs may be left floating with no impact on jitter. See “ LVPECL Output Termination” section. PIN DESCRIPTION 1 2 3 4 12 11 10 9 16 15 14 13 5678 IN VT VREF-AC /IN Q0 /Q0 /Q1 Q1 16-Pin MLF™ |
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