 2013 Microchip Technology Inc.

DS75083B-page 13

SST12LF09

7.0

PACKAGING DIAGRAMS

For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

Note:

Microchip Technology Drawing C04-14017A Sheet 1 of 1

16-Lead Super-Thin Quad Flatpack No-Leads (Q3CE/F) - 2.5x2.5 mm Body [X2QFN]

16-x2qfn-2.5x2.5-Q3C-2.0

Note:

From the bottom view, the pin #1 indicator may be either a 45-degree chamfer or a half-circle notch.

2. The topside pin #1 indicator is laser engraved; its approximate shape and location is as shown.

3. The external paddle is electrically connected to the die back-side and to VSS.

This paddle must be soldered to the PC board; it is required to connect this paddle to the VSS of the unit.

Connection of this paddle to any other voltage potential will result in shorts and electrical malfunction of the device.

4. Untoleranced dimensions are nominal target dimensions.

5. All linear dimensions are in millimeters (max/min).

1.