DM9008F datasheet(21/68 Pages) ETC

21 / 68 page

DM9008

ISA/Plug & Play Super Ethernet Contoller

Final

Version :DM9008-DS-F02

June 14, 2000

Interrupt Mask Register (IMR)

The Interrupt Mask Register is used to mask interrupts. Each

interrupt mask bit corresponds to a bit in the Interrupt Status

issued whenever the corresponding bit in the ISR is set. If any

bit in the IMR is set low, an interrupt will not occur when the bit

in the ISR is set. The IMR powers up all zeroes.

5432

RDCE

CNTE

OVWE

TXEE

RXEE

PTXE

PRXE

Bit

Symbol

Description

PRXE

PACKET RECEIVED INTERRUPT ENABLE

Enables interrupt when packet is received

PTXE

PACKET TRANSMITTED INTERRUPT ENABLE

Enables interrupt when packet is transmitted

RXEE

RECEIVE ERROR INTERRUPT ENABLE

Enables interrupt when packet is received with error

TXEE

TRANSMIT ERROR INTERRUPT ENABLE

Enables interrupt when packet transmission results in error

OVWE

OVERWRITE WARNING INTERRUPT ENABLE

Enables interrupt when Buffer Management Logic lacks sufficient buffers to store

incoming packet

CNTE

COUNTER OVERFLOW INTERRUPT ENABLE

Enables interrupt when MSB of one or more of the Network Tally counters has been set

RDCE

DMA COMPLETE INTERRUPT ENABLE

Enables interrupt when Remote DMA transfer has been completed

Reserved

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