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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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GL600USB-B Scheda tecnica(PDF) 14 Page - List of Unclassifed Manufacturers |
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GL600USB-B Scheda tecnica(HTML) 14 Page - List of Unclassifed Manufacturers |
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14 / 38 page  14 06/19/2000 GL600USB/GL600USB-A/GL600USB-B Revision 1.3 1: Endpoint 0 FIFO data are ready to be transmitted. Data will be transmitted when a valid IN token is received. This bit is automatically cleared by hardware after the transaction complete (ACK is received). 0: Endpoint 0 FIFO data are not ready to be transmitted and respond with a NAK to a valid IN transaction. Value on POR: “- 0 0 0 0 0 0 0” Note 1: “W/O” means write-only bit. 0 will be returned when reading this bit FFDAT0 (Address 17h, Endpoint 0 FIFO port) R/W R/W R/W R/W R/W R/W R/W R/W FFDAT7 FFDAT6 FFDAT5 FFDAT4 FFDAT3 FFDAT2 FFDAT1 FFDAT0 Endpoint 0 FIFO data port Endpoint 0 FIFO is a 8 bytes FIFO. Firmware can read/write this port 8 times to get/put the FIFO data. Value on POR: “x x x x x x x x” FFDAT1 (Address 18h, Endpoint 1 FIFO port) R/W R/W R/W R/W R/W R/W R/W R/W FFDAT7 FFDAT6 FFDAT5 FFDAT4 FFDAT3 FFDAT2 FFDAT1 FFDAT0 Endpoint 1 FIFO data port Endpoint 1 FIFO is 8 bytes FIFO. Firmware can read this port 8 times to get the FIFO data. Value on POR: “x x x x x x x x” EP0RXST (Address 19h, Endpoint 0 receiving status register) R/O R/O R/O R/O RXST3 RXST2 RXST1 RXST0 RXST[3:0]: If EP0RX is set, then there’s a complete transaction. RXST[3:0] indicate the packet received. Bit Value Packet received 1001 SETUP token with DATA0 packet 0101 OUT token with DATA0 packet 0110 OUT token with DATA1 packet Value on POR: “- - - - x x x x” 4.3 MCU FUNCTION REGISTERS Address Name Function 00h INDR Addressing this location will use the content of INDAR to address data memory (not a physical address) 01h TIMER Timer register 02h PCL Program Counter’s low byte 03h STATUS Status register 04h INDAR Indirect address register 06h PORT1 Port 1 data register 07h PORT2 Port 2 data register 0Ah PCHBUF Write buffer of Program Counter’s bit 10-8 0Bh INTEN Interrupt enable register 0Dh PHVAL Photo-sensor value register 0Eh PHSEL Photo-sensor input select register 0Fh DMODE Photo-sensor input mode register 80h INDR Addressing this location will use the content of INDAR to address data memory (not a physical address) 81h PSCON Prescaler control register |
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