IP1001 datasheet(12/18 Pages) IRF

12 / 18 page

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iP1001

Application Issues

Setting V

OUT above 2V

In certain applications where the output voltage is

required to be set higher than the maximum DAC

code setting of 2V, it is possible to use an external

resistive voltage divider which, for accuracy, needs

to have 1% or better tolerance. The switching

frequency should be set at 200kHz by connecting

the FREQ pin to V

DD. Also, the output voltage should

never be set higher than 3.3V with a V

IN minimum of

5V, or 2.5V with a V

IN minimum of 3.3V. The DAC

code should be set to 2V and the following equation

used to select the resistors:

OUT = VF x (1 + R3/R4)

See the reference design for reference designators.

Note that the impedance at V

F is 180KΩ ±35%. It is

recommended that R3 be calculated assuming a

value of 1k

Ω for R4. Connect V

FS to VF and GNDS to

PGND.

Duty Cycle D = V

OUT / VIN >50%

For duty cycles >50% the switching frequency should

be set at 200kHz. 300kHz switching frequency can

be selected if the output is less than 2V and the duty

cycle is <50%.

For duty cycles >50%, add external compensation

ramp from the Vsw terminal of the iP1001 device as

shown in the reference design through R9 resistor

and C21 capacitor (Fig 10a.). For optimum perfor-

mance maintain a RC time constant of approximately

µs.

IP1001 Scheda tecnica(PDF) 12 Page - International Rectifier