TDA7565

6/10

SOFTWARE SPECIFICATIONS

The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from

µP to TDA7565) or

read instruction (from TDA7565 to

µP).

If R/W = 0, the

µP sends 2 "Instruction Bytes": IB1 and IB2.

IB1

IB2

D7

Address bit

D6

Address bit

D5

Address bit

D4

Address bit

D3

Address bit

D2

Address bit

D1

Address bit

D0(R/W)

Read/Write bit

0 = Write instruction

1 = read instruction

D7

Sel Freq Switch 1

D6

Sel Freq Switch 2

D5

Offset Detection start (D5 = 1)

Offset Detection stop (D5 = 0) (off)

D4

Front Channel

Gain = 26dB (D4 = 0)

Gain = 12dB (D4 = 1)

D3

Rear Channel

Gain = 26dB (D3 = 0)

Gain = 12dB (D3 = 1)

D2

Mute front channels (D2 = 0)

Unmute front channels (D2 = 1)

D1

Mute rear channels (D1 = 0)

Unmute rear channels (D1 = 1)

D0

CD 1% (D0 = 0)

CD 10% (D0 = 1)

D7

Voltage Converter Enabled (D7 = 1)

Voltage Converter Disabled (D7 = 0)

D6

Regulated voltage selection 1

D5

Test Speed

D4

Stand-by on - Amplifier not working - (D4 = 0)

Stand-by off - Amplifier working - (D4 = 1)

D3

Regulated voltage selection 0)

D2

To be forced to “Level 1”

D1

Right Channel

Power amplifier working in standard mode (D1 = 0)

Power amplifier working in HiEff mode(D1 = 1)

D0

Left Channel

Power amplifier working in standard mode (D0 = 0)

Power amplifier working in HiEff mode(D0 = 1)