STM32L073CZ datasheet(27/139 Pages) STMICROELECTRONICS

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STM32L073xx

Functional overview

3.10

Direct memory access (DMA)

The flexible 7-channel, general-purpose DMA is able to manage memory-to-memory,

peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports

circular buffer management, avoiding the generation of interrupts when the controller

reaches the end of the buffer.

Each channel is connected to dedicated hardware DMA requests, with software trigger

support for each channel. Configuration is done by software and transfer sizes between

source and destination are independent.

The DMA can be used with the main peripherals: SPI, I2C, USART, LPUART,

general-purpose timers, DAC, and ADC.

3.11

Liquid crystal display (LCD)

The LCD drives up to 8 common terminals and 48 segment terminals to drive up to 384

pixels.



Internal step-up converter to guarantee functionality and contrast control irrespective of

VDD. This converter can be deactivated, in which case the VLCD pin is used to provide

the voltage to the LCD



Supports static, 1/2, 1/3, 1/4 and 1/8 duty



Supports static, 1/2, 1/3 and 1/4 bias



Phase inversion to reduce power consumption and EMI



Up to 8 pixels can be programmed to blink



Unneeded segments and common pins can be used as general I/O pins



LCD RAM can be updated at any time owing to a double-buffer



The LCD controller can operate in Stop mode



VLCD rails decoupling capability

3.12

Analog-to-digital converter (ADC)

A native 12-bit, extended to 16-bit through hardware oversampling, analog-to-digital

converter is embedded into STM32L073xx device. It has up to 16 external channels and 3

internal channels (temperature sensor, voltage reference, VLCD voltage measurement).

Three channels, PA0, PA4 and PA5, are fast channels, while the others are standard

channels.

The ADC performs conversions in single-shot or scan mode. In scan mode, automatic

conversion is performed on a selected group of analog inputs.

The ADC frequency is independent from the CPU frequency, allowing maximum sampling

rate of 1.14 MSPS even with a low CPU speed. The ADC consumption is low at all

frequencies (~25 µA at 10 kSPS, ~240 µA at 1MSPS). An auto-shutdown function

guarantees that the ADC is powered off except during the active conversion phase.

The ADC can be served by the DMA controller. It can operate from a supply voltage down to

1.65 V.

The ADC features a hardware oversampler up to 256 samples, this improves the resolution

to 16 bits (see AN2668).

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