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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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STM32L475VC Scheda tecnica(PDF) 25 Page - STMicroelectronics |
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STM32L475VC Scheda tecnica(HTML) 25 Page - STMicroelectronics |
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25 / 193 page  DocID027692 Rev 2 25/193 STM32L475xx Functional overview 53 Standby mode, supplied by the low-power Regulator (Standby with RAM2 retention mode). The device exits Standby mode when an external reset (NRST pin), an IWDG reset, WKUP pin event (configurable rising or falling edge), or an RTC event occurs (alarm, periodic wakeup, timestamp, tamper) or a failure is detected on LSE (CSS on LSE). The system clock after wakeup is MSI up to 8 MHz. • Shutdown mode The Shutdown mode allows to achieve the lowest power consumption. The internal regulator is switched off so that the VCORE domain is powered off. The PLL, the HSI16, the MSI, the LSI and the HSE oscillators are also switched off. The RTC can remain active (Shutdown mode with RTC, Shutdown mode without RTC). The BOR is not available in Shutdown mode. No power voltage monitoring is possible in this mode, therefore the switch to Backup domain is not supported. SRAM1, SRAM2 and register contents are lost except for registers in the Backup domain. The device exits Shutdown mode when an external reset (NRST pin), a WKUP pin event (configurable rising or falling edge), or an RTC event occurs (alarm, periodic wakeup, timestamp, tamper). The system clock after wakeup is MSI at 4 MHz. |
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