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TH71221 Scheda tecnica(PDF) 19 Page - Melexis Microelectronic Systems |
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TH71221 Scheda tecnica(HTML) 19 Page - Melexis Microelectronic Systems |
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19 / 44 page ![]() TH71221 27 to 930MHz FSK/FM/ASK Transceiver 39010 071221 Page 19 of 44 Data Sheet Rev. 009 Nov/15 4.1.3 Modulation Type Modulation type ASK FSK ASK / FSK 0 1 4.1.4 LNA Gain Mode LNA gain high low GAIN_LNA 0 1 4.2 Programmable User Mode Operation The transceiver can also be used in programmable user mode. After power-up the first logic change at pin FS0/SDEN enters into this mode. Now full programmability can be achieved via the Serial Control Interface (SCI). 4.2.1 Serial Control Interface Description A 3-wire (SCLK, SDTA, SDEN) Serial Control Interface (SCI) is used to program the transceiver in program- mable user mode. At each rising edge of the SCLK signal, the logic value on the SDTA pin is written into a 24-bit shift register. The data stored in the shift register are loaded into one of the 4 appropriate latches on the rising edge of SDEN. The control words are 24 bits lengths: 2 address bits and 22 data bits. The first two bits (bit 23 and 22) are latch address bits. As additional leading bits are ignored, only the least significant 24 bits are serial-clocked into the shift register. The first incoming bit is the most significant bit (MSB). To program the transceiver in multi-channel application, four 24-bit words may be sent: A-word, B-word, C-word and D-word. If individual bits within a word have to be changed, then it is sufficient to program only the appropriate 24-bit word. The serial data input timing and the structure of the control words are illustrated in Fig. 12 and 13. Fig. 12: SCI Block Diagram A - LATCH ADDR DECODER B - LATCH C - LATCH D - LATCH 22 A-word 22 22 ‘’ 00 ‘’ 10 ‘’ 11 ‘’ 01 2 22 22 22 22 B-word 22 D-word 22 C-word 24-BIT SHIFT REGISTER SDEN SDTA SCLK |
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