231

PS8315-2

04/08/99

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PI6C103

Precision Clock Synthesizer for Mobile PCs

Output

Buffer

Test

Point

2.0

1.25

0.4

tHKH

Duty Cycle

tHKP

2.5V

Clocking

Interface

tHKL

2.4

1.5

0.4

tPKH

tPKP

3.3V

Clocking

Interface

(TTL)

tPKL

Test Load

Figure 2. Clock Output Waveforms

Figure 1. Host Clock and PCI CLK Timing

1.25V

2.5V

Host CLK

PCI CLK

1.5V

3.3V

1.25V

2.5V

Host CLK

PCI CLK

1.5V

3.3V

1.5V

1.25V

1.25V