DSP56156ROM datasheet(29/76 Pages) MOTOROLA

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AC Electrical Characteristics and Timing

MOTOROLA

DSP56156 Data Sheet

External Bus Synchronous Timing

(VCC = 5.0 V dc ± 10%, TJ = -40° to +125°C, CL = 50 pF + 1 TTL Load)

Table 15 lists external bus synchronous timing. Figure 17 and illustrate the bus timings

with no wait states and two wait states, respectively.

Table 15 External Bus Synchronous Timing

Num

Characteristic

40 MHz

50 MHz

60 MHz

Unit

Min

Max

Min

Max

Min

Max

EXTAL CLK In High to CLKO High

2.4

CLKO High to

a. A0-A15 Valid

b. PS/DS, R/W Valid, BS, RD Asserted

4.7

(See Note)

BS Width Deasserted

18.3

—

13.4

—

9.8

—

CLKO High to WR Asserted Low

T+3.1

T+12.4

T+3.1

T+12.4

T+3.1

T+12.4

WR and RD Deasserted High to BS

Asserted Low (2 Successive Bus Cycles)

14.3

15.8

11.8

13.3

10.2

11.8

CLKO High to BS Deasserted

2.6

10.3

2.6

10.3

2.6

10.3

TA Valid to CLKO High (Setup)

4.5

—

4.5

—

4.5

—

CLKO High to TA Invalid (Hold)

—

CLKO High to D0-D15 Out Valid

1.7

7.1

1.7

7.1

1.7

7.1

CLKO High to D0-D15 Out Invalid

2.0

—

2.0

—

2.0

—

D0-D15 In Valid to CLKO Low (Setup)

—

CLKO Low to D0-D15 In Invalid (Hold)

—

CLKO Low to WR, RD Deasserted

—

WR, RD Hold Time from CLKO Low

2.2

—

2.2

—

2.2

—

CLKO High to D0-D15 Three-state

CLKO High to D0-D15 Out Active

1.2

4.2

1.2

4.2

1.2

4.2

CLKO High to A0-A15, PS/DS, R/W Invalid

2.8

—

2.8

—

2.8

—

NOTE:

10 ns CL = 25 pF

External Bus Synchronous Timing

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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