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LM363 Scheda tecnica(PDF) 14 Page - National Semiconductor (TI) |
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LM363 Scheda tecnica(HTML) 14 Page - National Semiconductor (TI) |
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14 / 22 page ![]() Application Hints (Continued) If power supply rejection is critical frequently only the nega- tive PSRR need be adjusted since the positive PSRR is more tightly specified Any or all of the trim schemes of Figure 10 can be combined as desired As long as the cen- ter tap of the 100k trimpot is returned to a voltage 200 mV below Va the trim schemes shown will not greatly affect TLH5609 – 17 VOS Both the gain and DC CMRR trims can degrade posi- tive PSRR the positive PSRR can then be nulled out if de- sired The correct order of trimming from first to last is bias current gain CMRR negative PSRR positive PSRR and VOS Top Trace Cable Shield Grounded Bottom Trace Cable Shield Bootstrapped TLH5609 – 18 FIGURE 9 Improved Response using Shield Drivers TLH5609 – 19 FIGURE 10 Other Trims for 16-Pin Package 14 |
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