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LAN9250 Scheda tecnica(PDF) 291 Page - Microchip Technology |
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LAN9250 Scheda tecnica(HTML) 291 Page - Microchip Technology |
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291 / 421 page ![]() 2015 Microchip Technology Inc. DS00001913A-page 291 LAN9250 FIGURE 13-8: EEPROM LOADER FLOW DIAGRAM Byte 0 = A5h N DIGITAL_RST, RST#, POR, RELOAD Y EPC_BUSY = 1 Read Byte 0 Read Bytes 1-6 Write Bytes 1-6 into host MAC Address Registers Read Byte 7-16 Byte 7 = A5h Y Write Bytes 8-16 into Configuration Strap registers Load registers with current straps and restart PHY Auto-negotiation Read Byte 17 Byte 17 = A5h Do register data loop Y Load registers with current straps and restart PHY Auto-negotiation N EPC_BUSY = 0 HMAC Reset Byte 0 = A5h Read Bytes 1-6 Write Bytes 1-6 into host MAC Address Registers Y Y EPC_BUSY = 1 Read Byte 0 N N |
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