MCP633 datasheet(5/60 Pages) MICROCHIP

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DS20002197C-page 5

MCP631/2/3/4/5/9

1.3

Timing Diagram

FIGURE 1-1:

Timing Diagram.

1.4

Test Circuits

The circuit used for most DC and AC tests is shown in

Figure 1-2. It independently sets VCM and VOUT; see

Equation 1-1. The circuit’s Common-Mode voltage is

(VP +VM)/2, not VCM. VOST includes VOS plus the

effects of temperature, CMRR, PSRR and AOL.

EQUATION 1-1:

TEMPERATURE SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VDD = +2.5V to +5.5V, VSS = GND.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Temperature Ranges

Specified Temperature Range

-40

—

+125

°C

Operating Temperature Range

-40

—

+125

°C

Note 1

Storage Temperature Range

-65

—

+150

°C

Thermal Package Resistances

Thermal Resistance, 5L-SOT-23

θJA

—

201.0

—

°C/W

Thermal Resistance, 6L-SOT-23

θJA

—

190.5

—

°C/W

Thermal Resistance, 8L-2x3 TDFN

θJA

—

52.5

—

°C/W

Thermal Resistance, 8L-3x3 DFN

θJA

—

56.7

—

°C/W

Note 2

Thermal Resistance, 8L-SOIC

θJA

—

149.5

—

°C/W

Thermal Resistance, 10L-3x3 DFN

θJA

—

54.0

—

°C/W

Note 2

Thermal Resistance, 10L-MSOP

θJA

—

202

—

°C/W

Thermal Resistance, 14L-SOIC

θJA

—

90.8

—

°C/W

Thermal Resistance, 14L-TSSOP

θJA

—

100

—

°C/W

Thermal Resistance, 16L-4x4-QFN

θJA

—

52.1

—

°C/W

Note 2

Note 1:

Operation must not cause TJ to exceed Maximum Junction Temperature specification (+150°C).

Measured on a standard JC51-7, four-layer printed circuit board with ground plane and vias.

VOUT

ISS

ICS

-1 µA

High Z

0.7 µA

-2.5 mA

-1 µA

tON

tOFF

High Z

0.1 nA

0.7 µA

VIL

VIH

(typical)

Where:

GDM = Differential Mode Gain

(V/V)

GN = Noise Gain

(V/V)

VCM = Op Amp’s Common-Mode

Input Voltage

(V)

VOST = Op Amp’s Total Input Offset

Voltage

(mV)

-------

P 1

-------

–





REF

-------





OST

IN -

IN+

–

OUT

REF

–

G

OSTGN

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