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STW451027/HF Scheda tecnica(PDF) 43 Page - STMicroelectronics |
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STW451027/HF Scheda tecnica(HTML) 43 Page - STMicroelectronics |
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43 / 57 page ![]() Obsolete Product(s) - Obsolete Product(s) STw4510 Electrical and timing characteristics 43/57 Vana(i) regulator in sleep mode (en_vana3 = 1, SLEEP =’1’) VBAT Input power supply Vana(i) = 1.8 V, 2.8 V, 3.0 V, 3.3 V MAX (Vana(i)_out+0. 2, Vbat_min) 3.6 5.5 V VOUT Output voltage Vana(i)_sel[1:0] pads 00 01 10 11 -3 % 1.8 2.8 3.0 3.3 +3 % V IOUT Output current 500 µA I(1)Q Quiescent current IOUT = 0 mA 26 µA PSRR(1) Power supply rejection Vana(i) = 2.8 V IOUT = 5 mA Vpp = 0.3 V, F: [0; 20] kHz 40 dB Lir Line regulation VBAT: [2.7; 5.5] V 5 mV Ldr Load regulation IOUT: [0.1; 0.5] mA 10 mV Lirt Transient line regulation Vana(i) = 2.8 V IOUT = 0.5 mA VBAT:[3; 3.3] V tR = tF = 10 µs 2mV Ldrt Transient load regulation Vana(i) = 2.8 V IOUT= [0.1; 0.5] mA tR = tF = 1 µs 20 mV 1. Guaranteed by design 2. Quiescent current defined is the current measured on the power supply voltage dedicated to the Vana(i) with only one Vana(i) on at the same time Table 21. LDO regulator - Vana(i) with i=2 or 3 (continued) Symbol Description Test conditions Min. Typ. Max. Units |
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