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ZSPM2000 Scheda tecnica(PDF) 19 Page - Integrated Device Technology |
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ZSPM2000 Scheda tecnica(HTML) 19 Page - Integrated Device Technology |
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19 / 42 page ![]() ZSPM2000 Datasheet © 2016 Integrated Device Technology, Inc. 19 January 27, 2016 3.3.6. Pre-biased Start-up and Soft Stop Dedicated pre-biased start-up logic ensures proper start-up of the power converter when the output capacitors are pre-charged to a non-zero output voltage. Closed-loop stability is ensured during this phase. The ZSPM2000 also supports pre-biased off, i.e. the output voltage is not ramped down to zero and instead remains at a predefined level (VOFF_nom). This value can be configured via the Pink Power Designer™ graphical user interface (GUI). After receiving the shutdown command, via PMBus™ or the CONTROL pin, the ZSPM2000 ramps down the value to the predefined value. Once the value is reached the MOSFET driver will be put into tri- state mode. Both gate drive outputs will be pulled low in the tri-state mode. Figure 3.3 Power Sequencing with Non-zero Off Voltage 3.3.7. Current Sensing The ZSPM2000 offers cycle-by-cycle average current sensing with configurable over-current protection. A dedi- cated ADC is used to provide fast and accurate current information over the switching period. The acquired information is compared with configurable current thresholds to report warning and error levels to the user. DCR current sensing across the inductor or across a dedicated shunt resistor is supported. Additionally, the device uses DCR temperature compensation via an external temperature sense element. This increases the accuracy of the current sense method by counteracting the significant change of the DCR over temperature. To acquire accurate current information, the selection of the current sensing circuit is of critical importance. The schematic of the required current sensing circuitry is shown in Figure 3.4 for the widely-used DCR current-sensing method, which uses the parasitic resistance of the inductor to acquire the current information. The principle is based on a matched time-constant between the inductor and the low-pass filter comprising R7 and C8. The two resistors R6 and R7 should be matched fairly well in order to provide good DC voltage rejection; .i.e. to reduce the influence of the output voltage level in the current measurement. t tON_DELAY tON_RISE tON_MAX tOFF_DELAY tOFF_FALL 0 V VONnom tOFF_MAX VOFFnom Tri-state |
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