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ADVANCE DATA

The minimum size of bootstrap capacitor is:

An example follows:

a) using a 25A @ 125C IGBT (IRGP30B120KD):

• I

QBS = 800 µA

(See Static Electrical Charact.);

• I

LK = 50 µA

(See Static Electrical Charact.);

• Q

LS = 20 nC;

• Q

G = 160 nC (Datasheet IRGP30B120KD);

• I

LK_GE = 100 nA (Datasheet IRGP30B120KD);

• I

LK_DIODE = 100 µA (with reverse recovery

time <100 ns);

• I

LK_CAP = 0

(neglected for ceramic capacitor);

• I

DS- = 150 µA (see Static Electrical Charact.);

• T

HON = 100 µs.

And:

• V

CC = 15 V

• V

F = 1 V

• V

CEonmax = 3.1 V

• V

GEmin = 10.5 V

the maximum voltage drop

∆V

BS becomes

and the boodstrap capacitor is:

TOT

BOOT

∆

min

−

≤

∆

CEon

min

−

BOOT

725

290

≥

NOTICE:

Here above V

CC has been cho-

sen to be 15V. Some IGBTs may require

higher supply to work correctly with the boot-

strap technique. Also Vcc variations must be

accounted in the above formulas.

Some important considerations

a. Voltage ripple

There are three different cases making the boot-

strap circuit gets conductive (see figure 19):

•

LOAD < 0; the load current flows in the low

side IGBT displaying relevant V

CEon

In this case we have the lowest value for V

BS.

This represents the worst case for the bootstrap

capacitor sizing. When the IGBT is turned off

the Vs node is pushed up by the load current

until the high side freewheeling diode get for-

warded biased

•

LOAD = 0; the IGBT is not loaded while be-

ing on and V

CE can be neglected

•

LOAD > 0; the load current flows through the

freewheeling diode

In this case we have the highest value for V

BS.

Turning on the high side IGBT, I

LOAD flows into

it and V

S is pulled up.

To minimize the risk of undervoltage, bootstrap

capacitor should be sized according to the

LOAD<0 case.

CEon

−

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