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ZLED7031 Scheda tecnica(PDF) 10 Page - Integrated Device Technology |
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ZLED7031 Scheda tecnica(HTML) 10 Page - Integrated Device Technology |
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10 / 20 page  ZSLS7031 Datasheet © 2016 Integrated Device Technology, Inc. 10 January 26, 2016 Figure 2.2 ZSLS7031 Soft Start 2.4 Gate Output Voltage Clamp ZSLS7031 provides the voltage clamp for the GATE output. When the voltage at VCC is smaller than the VGATEclp threshold (see specification 1.3.3), the output high voltage of the GATE output is approximately VCC. When the voltage of VCC is greater than the VGATEclp threshold, the output high voltage of GATE is limited to the VGATEclp threshold. 2.5 VSINE Detection Network and Active PFC The voltage VSINE at the VSINE pin is used to control the waveform of the input current to ensure that it follows the input voltage waveform, VBULK, to achieve a high power factor (PF) and low total harmonic distortion (THD) perfor- mance, as demonstrated in Figure 2.3. |
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