WM8753 datasheet(55/87 Pages) WOLFSON

55 / 87 page

WM8753L

Advanced Information

AI Rev 3.1 June 2004

LEFT CHANNEL

RIGHT CHANNEL

LRC /

VXFS

BCLK /

VXCLK

DACDAT /

ADCDAT /

VXDIN /

VXDOUT

1/fs

n-2 n-1

LSB

MSB

n-2 n-1

LSB

MSB

Figure 17 Right Justified Audio Interface (assuming n-bit word length)

In I

2S mode, the MSB is available on the second rising edge of BCLK following a LRC transition. The

other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency

and sample rate, there may be unused BCLK cycles between the LSB of one sample and the MSB of

the next.

LEFT CHANNEL

RIGHT CHANNEL

LRC /

VXFS

BCLK /

VXCLK

DACDAT /

ADCDAT /

VXDIN /

VXDOUT

1/fs

n-2 n-1

LSB

MSB

n-2 n-1

LSB

MSB

1 BCLK

Figure 18 I

2S Justified Audio Interface (assuming n-bit word length)

In DSP mode, the left channel MSB is available on either the 1

st (mode B) or 2nd (mode A) rising edge

of BCLK (selectable by LRP) following a rising edge of LRC. Right channel data immediately follows

left channel data. Depending on word length, BCLK frequency and sample rate, there may be unused

BCLK cycles between the LSB of the right channel data and the next sample.

LEFT CHANNEL

RIGHT CHANNEL

LRC /

VXFS

BCLK /

VXCLK

DACDAT /

ADCDAT /

VXDIN /

VXDOUT

n-2 n-1

LSB

MSB

n-2 n-1

1 BCLK / VXCLK

Input Word Length (WL)

1/fs

Figure 19 DSP Mode Audio Interface (mode A, LRP/PLRP=0)

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