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THCV218 Scheda tecnica(PDF) 21 Page - THine Electronics, Inc.

Il numero della parte THCV218
Spiegazioni elettronici  V-by-One HS High-speed Video Data Transmitter and Receiver
PDF  35 Pages
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Produttore elettronici  THINE [THine Electronics, Inc.]
Homepage  http://www.thine.co.jp/index_e.html
Logo THINE - THine Electronics, Inc.

THCV218 Scheda tecnica(HTML) 21 Page - THine Electronics, Inc.

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THCV217-THCV218_Rev.2.11_E
Copyright(C)2016 THine Electronics,Inc.
21
THine Electronics, Inc.
Security E
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
COL=L
294
-
1250
ps
COL=H
392
-
1667
ps
tRISK
RX0/1 Input Inter Pair Skew
Margin
-
-
15
UI
SiSo, DiDo
11.76
50.0
ns
DiSo
5.88
25.0
ns
tRCH
CLKOUT High Time
-
T/2
-
ns
tRCL
CLKOUT Low Time
-
T/2
-
ns
tDOUT
CMOS Data OUT Period
-
T
-
ns
tRS
CMOS Data Setup to CLKOUT
0.45×tRCP-0.45
-
-
ns
tRH
CMOS Data Hold to CLKOUT
0.45×tRCP-0.45
-
-
ns
PLL=H
-
3T/16
-
ns
PLL=L
-
3T/32
-
ns
Clock
-
0.7
1.0
ns
Data
-
1.4
2.0
ns
Clock
-
0.7
1.0
ns
Data
-
1.4
2.0
ns
SiSo/DiDo 8bit PLL=L
(18+5/10)×tRCP
SiSo/DiDo 10bit PLL=L
18×tRCP
SiSo/DiDo 8bit PLL=H
(16+4/10)×tRCP
SiSo/DiDo 10bit PLL=H
(15+7/10)×tRCP
DiSo 8bit
(39+5/10)×tRCP
DiSo 10bit
38t×RCP
tRPD
Power On to PDN High Delay
0
-
-
ns
tRHPD0 PDN High to HTPDN Low Delay
-
-
1
us
tRHPD1 PDN Low to HTPDN High Delay
-
-
1
us
tRPLL0
Training Pattern Input to
LOCKN Low Delay
-
-
10
ms
tRPLL1
PDN Low to LOCKN High
Delay
-
-
10
us
tRLCK0
LOCKN Low to TTL Output
Delay
-
-
5
ms
tRLCK1
LOCKN High to TTL Low-fixed
Delay
-
-
0
ns
ns
Input Data to Output Clock
Delay
tRBIT
Unit Interval
tTHL
CMOS High to Low Transition
Time
tTLH
CMOS Low to High Transition
Time
tDK
CLKOUT Delay Time
tRDC
typ.-10
typ.+10
T
tRCP
CLKOUT Period
Table 17. THCV218 Switching Characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
tDEH
DE=High Duration
2×tTCIP
-
-
sec
SiSo, DiDo
2×tTCIP
-
-
sec
SiDo, DiSo
4×tTCIP
-
-
sec
tDEL
DE=Low Duration
Table 18. DE requirement



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