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LM5100 Scheda tecnica(PDF) 2 Page - National Semiconductor (TI) |
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LM5100 Scheda tecnica(HTML) 2 Page - National Semiconductor (TI) |
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2 / 12 page ![]() Connection Diagrams Ordering Information Ordering Number Package Type NSC Package Drawing Supplied As LM5100/01M SOIC-8 M08A Shipped in anti static rails LM5100/01MX SOIC-8 M08A 2500 shipped as Tape & Reel LM5100/01SD LLP-10 SDC10A 1000 shipped as Tape & Reel LM5100/01SDX LLP-10 SDC10A 4500 shipped as Tape & Reel Pin Description Pin # Name Description Application Information SO-8 LLP-10 11 V DD Positive gate drive supply Locally decouple to V SS using low ESR/ESL capacitor located as close to IC as possible. 2 2 HB High side gate driver bootstrap rail Connect the positive terminal of the bootstrap capacitor to HB and the negative terminal to HS. The Bootstrap capacitor should be place as close to IC as possible. 3 3 HO High side gate driver output Connect to gate of high side MOSFET with a short low inductance path. 4 4 HS High side MOSFET source connection Connect to bootstrap capacitor negative terminal and the source of the high side MOSFET. 5 7 HI High side driver control input The LM5100 inputs have CMOS type thresholds. The LM5101 inputs have TTL type thresholds. Unused inputs should be tied to ground and not left open. 6 8 LI Low side driver control input The LM5100 inputs have CMOS type thresholds. The LM5101 inputs have TTL type thresholds. Unused inputs should be tied to ground and not left open. 79 V SS Ground return All signals are referenced to this ground. 8 10 LO Low side gate driver output Connect to the gate of the low side MOSFET with a short low inductance path. Note: For LLP-10 package, it is recommended that the exposed pad on the bottom of the LM5100 / LM5101 be soldered to ground plane on the PC board, and the ground plane should extend out from beneath the IC to help dissipate the heat. Pins 5 and 6 have no connection. 20088801 20088802 FIGURE 2. www.national.com 2 |
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