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VSC7133 Scheda tecnica(PDF) 8 Page - Vitesse Semiconductor Corporation |
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VSC7133 Scheda tecnica(HTML) 8 Page - Vitesse Semiconductor Corporation |
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8 / 18 page ![]() VITESSE SEMICONDUCTOR CORPORATION Advance Product Information VSC7133 10-bit Transceiver for Fibre Channel and Gigabit Ethernet Page 8 © VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 1/17/00 G52187-0 Rev. 2.4 Figure 6: REFCLK Timing Waveforms Table 4: Reference Clock Requirements Parameter Description Min Max Units Conditions FR Frequency Range 98 136 MHz Range over which both transmit and receive reference clocks on any link may be centered FO Frequency Offset -200 200 ppm. Maximum frequency offset between transmit and receive reference clocks on one link DC REFCLK duty cycle 35 65 % Measured at 1.5V TR,TF REFCLK rise and fall time —1.5 ns. Between VIL(MAX) and VIH(MIN) REFCLKP VIL(MAX) VIH(MIN) TL TH TR TF REFLKN |
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