MAX660 datasheet(6/11 Pages) NSC

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Application Information (Continued)

Again, using a low ESR capacitor will result in lower ripple.

POSITIVE VOLTAGE DOUBLER

The MAX660 can operate as a positive voltage doubler (as

shown in the Typical Application Circuits). The doubling func-

tion is achieved by reversing some of the connections to the

device. The input voltage is applied to the GND pin with an

allowable voltage from 2.5V to 5.5V. The V+ pin is used as

the output. The LV pin and OUT pin must be connected to

ground. The OSC pin can not be driven by an external clock

in this operation mode. The unloaded output voltage is twice

of the input voltage and is not reduced by the diode D

1’s for-

ward drop.

The Schottky diode D

1 is only needed for start-up. The inter-

nal oscillator circuit uses the V+ pin and the LV pin (con-

nected to ground in the voltage doubler circuit) as its power

rails. Voltage across V+ and LV must be larger than 1.5V to

insure the operation of the oscillator. During start-up, D

1 is

used to charge up the voltage at V+ pin to start the oscillator;

also, it protects the device from turning-on its own parasitic

diode and potentially latching-up. Therefore, the Schottky di-

ode D

1 should have enough current carrying capability to

charge the output capacitor at start-up, as well as a low for-

ward voltage to prevent the internal parasitic diode from

turning-on. A Schottky diode like 1N5817 can be used for

most applications. If the input voltage ramp is less than

10V/ms, a smaller Schottky diode like MBR0520LT1 can be

used to reduce the circuit size.

SPLIT V+ IN HALF

Another interesting application shown in the Basic Applica-

tion Circuits is using the MAX660 as a precision voltage di-

vider. Since the off-voltage across each switch equals V

IN/2,

the input voltage can be raised to +11V.

CHANGING OSCILLATOR FREQUENCY

The internal oscillator frequency can be selected using the

Frequency Control (FC) pin. When FC is open, the oscillator

frequency is 10 kHz; when FC is connected to V+, the fre-

quency increases to 80 kHz. A higher oscillator frequency al-

lows smaller capacitors to be used for equivalent output re-

sistance and ripple, but increases the typical supply current

from 0.12 mA to 1 mA.

The oscillator frequency can be lowered by adding an exter-

nal capacitor between OSC and GND. (See Typical Perfor-

mance Characteristics.) Also, in the inverter mode, an exter-

nal clock that swings within 100 mV of V+ and GND can be

used to drive OSC. Any CMOS logic gate is suitable for driv-

ing OSC. LV must be grounded when driving OSC. The

maximum external clock frequency is limited to 150 kHz.

The switching frequency of the converter (also called the

charge pump frequency) is half of the oscillator frequency.

Note: OSC cannot be driven by an external clock in the

voltage-doubling mode.

TABLE 1. MAX660 Oscillator Frequency Selection

OSC

Oscillator

Open

10 kHz

V+

Open

80 kHz

Open

or V+

External

Capacitor

See Typical

Performance

Characteristics

N/A

External Clock

(inverter mode only)

External Clock

Frequency

CAPACITOR SELECTION

As discussed in the

Simple Negative Voltage Converter sec-

tion, the output resistance and ripple voltage are dependent

on the capacitance and ESR values of the external capaci-

tors. The output voltage drop is the load current times the

output resistance, and the power efficiency is

Where I

Q(V+) is the quiescent power loss of the IC device,

and I

OUT is the conversion loss associated with the

switch on-resistance, the two external capacitors and their

ESRs.

Since the switching current charging and discharging C

1 is

approximately twice as the output current, the effect of the

ESR of the pumping capacitor C

1 is multiplied by four in the

output resistance. The output capacitor C

2 is charging and

discharging at a current approximately equal to the output

current, therefore, its ESR only counts once in the output re-

sistance. However, the ESR of C

2 directly affects the output

voltage ripple. Therefore, low ESR capacitors (

Table 2) are

recommended for both capacitors to maximize efficiency, re-

duce the output voltage drop and voltage ripple. For conve-

nience, C

1 and C2 are usually chosen to be the same.

The output resistance varies with the oscillator frequency

and the capacitors. In

Figure 4, the output resistance vs. os-

cillator frequency curves are drawn for three different tanta-

lum capacitors. At very low frequency range, capacitance

plays the most important role in determining the output resis-

tance. Once the frequency is increased to some point (such

as 20 kHz for the 150 µF capacitors), the output resistance is

dominated by the ON resistance of the internal switches and

the ESRs of the external capacitors. A low value, smaller

size capacitor usually has a higher ESR compared with a

bigger size capacitor of the same type. For lower ESR, use

ceramic capacitors.

DS100898-3

FIGURE 3. Splitting V

IN in Half

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