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MM58174 Scheda tecnica(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Il numero della parte MM58174
Spiegazioni elettronici  Microprocessor-Compatible Real-Time Clock
PDF  8 Pages
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Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

MM58174 Scheda tecnica(HTML) 4 Page - National Semiconductor (TI)

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Circuit Description (Continued)
TLF6681 – 3
FIGURE 2 Crystal Oscillator
DAYS COUNTER
There are two Days counters
a) units of days
b) tens of days
The Days counters will count up to 28 29 30 or 31 days
depending on the state of the Months counters and the
Years Status Register Days counters have parallel load and
read multiplex capabilities
MONTHS COUNTERS
There are two Months counters
a) units of months
b) tens of months
The Months counters have parallel load and read multiplex
capabilities
YEARS STATUS REGISTER
The Years Status register is a shift register of 4 bits It will be
shifted every year on December 31st The status register
must be set in accordance with Table III No readout capa-
bility is provided
CHIP SELECT (CS)
An external chip select is provided The chip enable is ac-
tive low
COUNTER AND REGISTER SELECTION
Table I shows the coding on the address lines AD0 – AD3
which select the registers in the circuit to be either parallel
loaded or read on to the output bus
TLF6681 – 4
FIGURE 3 Test Mode Organization
STARTSTOP (RESET) LATCH
A logic ‘‘1’’ on DB0 at chip address 14 (E) will start the clock
running a logic ‘‘0’’ will stop the clock This function allows
the loading of time data into the clock and its precise start-
ing The clock starts at 01 seconds
TEST MODE
This mode is incorporated to facilitate production testing of
the circuit In this mode the 32768 Hz clock is fed forward
as shown in
Figure 3 For normal operation the circuit must
be set to the non-test mode as part of the system initializa-
tion This is accomplished by writing a logic ‘‘0’’ to DB3 at
AD0
TABLE I Address Decoding for Internal Registers
Selected
Counter
Address Bits
Mode
AD3 AD2 AD1 AD0
0 Test Only
0
0
0
0
Write Only
1 Tenths of Secs
0
0
0
1
Read Only
2 Units of Secs
0
0
1
0
Read Only
3 Tens of Secs
0
0
1
1
Read Only
4 Units of Mins
0
1
0
0
Read or Write
5 Tens of Mins
0
1
0
1
Read or Write
6 Units of Hours
0
1
1
0
Read or Write
7 Tens of Hours
0
1
1
1
Read or Write
8 Units of Days
1
0
0
0
Read or Write
9 Tens of Days
1
0
0
1
Read or Write
10 Day of Week
1
0
1
0
Read or Write
11 Units of Months
1
0
1
1
Read or Write
12 Tens of Months
1
1
0
0
Read or Write
13 Years
1
1
0
1
Write Only
14 StopStart
1
1
1
0
Write Only
15 Interrupt
1
1
1
1
Read or Write
4



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