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MP7543JS Scheda tecnica(PDF) 3 Page - Exar Corporation

Il numero della parte MP7543JS
Spiegazioni elettronici  5 V CMOS Serial Input 12-Bit Digital-to-Analog Converter
PDF  12 Pages
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Produttore elettronici  EXAR [Exar Corporation]
Homepage  http://www.exar.com
Logo EXAR - Exar Corporation

MP7543JS Scheda tecnica(HTML) 3 Page - Exar Corporation

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MP7543
3
Rev. 2.00
1
N/C
No Connection.
2IOUT1
DAC current output pin. Normally
terminated at op amp virtual ground.
3IOUT2
DAC current output pin. Normally
terminated at AGND.
4
AGND
Analog Ground.
5
STB1
Register A Strobe 1 input,
See Table 1.
6
N/C
No Connection.
7
LD1
DAC Register B Load 1 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
8
N/C
No Connection.
9
SR1
Serial Data Input to Register A.
10
STB2
Register A Strobe 2 input,
See Table 1.
11
N/C
No Connection.
12
LD2
DAC Register B Load 2 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
13
STB3
Register A Strobe 3 input,
See Table 1.
14
STB4
Register A Strobe 4 input,
See Table 1.
15
DGND
Digital Ground.
16
N/C
No Connection.
17
CLR
Register B CLEAR input (active
LOW), can be used to asynchronously
reset Register B to 0000 0000 0000.
18
VDD
+5 V Supply Input.
19
VREF
Reference input. Can be positive or
negative DC voltage or AC signal.
20
RFB
DAC Feedback Resistor.
PIN OUT DEFINITIONS
1IOUT1
DAC current output pin. Normally
terminated at op amp virtual ground.
2IOUT2
DAC current output pin. Normally
terminated at AGND.
3
AGND
Analog Ground.
4
STB1
Register A Strobe 1 input,
See Table 1.
5
LD1
DAC Register B Load 1 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
6
N/C
No Connection.
7
SRI
Serial Data Input to Register A.
8
STB2
Register A Strobe 2 input,
See Table 1.
9
LD2
DAC Register B Load 2 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
10
STB3
Register A Strobe 3 input,
See Table 1.
11
STB4
Register A Strobe 4 input,
See Table 1.
12
DGND
Digital Ground.
13
CLR
Register B CLEAR input (active
LOW), can be used to asynchronously
reset Register B to 0000 0000 0000.
14
VDD
+5 V Supply Input.
15
VREF
Reference input. Can be positive or
negative DC voltage or AC signal.
16
RFB
DAC Feedback Resistor.
PIN NO.
NAME
DESCRIPTION
PIN NO.
NAME
DESCRIPTION
PDIP, CDIP and SOIC
PLCC



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