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PC87363 Scheda tecnica(PDF) 23 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Il numero della parte PC87363
Spiegazioni elettronici  128-Pin LPC SuperI/O with MIDI and Game Ports, Extended Wake-Up and Protection
PDF  200 Pages
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Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87363 Scheda tecnica(HTML) 23 Page - National Semiconductor (TI)

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1.0 Signal/Pin Connection and Description (Continued)
23
www.national.com
1.4.6
Game Port
1.4.7
General-Purpose Input/Output (GPIO) Ports
1.4.8
Infrared (IR)
Signal
Pin(s)
I/O Buffer Type Power Well
Description
JOYAX
117
I/O
INTS/OD12
VDD
Joystick A X-Axis. Indicates X-axis position of joystick A.
JOYAY
118
I/O
INTS/OD12
VDD
Joystick A Y-Axis. Indicates Y-axis position of joystick A.
JOYABTN0 119
I
INTS
VDD
Joystick A Button 0. Indicates button 0 status of joystick A.
JOYABTN1 120
I
INTS
VDD
Joystick A Button 1. Indicates button 1 status of joystick A.
JOYBX
121
I/O
INTS/OD12
VDD
Joystick B X-Axis. Indicates X-axis position of joystick B.
JOYBY
122
I/O
INTS/OD12
VDD
Joystick BY-Axis. Indicates Y-axis position of joystick B.
JOYBBTN0 123
I
INTS
VDD
Joystick B Button 0. Indicates button 0 status of joystick B.
JOYBBTN1 124
I
INTS
VDD
Joystick B Button 1. Indicates button 1 status of joystick B.
Signal
Pin/s
I/O Buffer Type Power Well
Description
GPIO00-07 2-9
I/O
INTS/
OD6,O3/6
VDD
General-Purpose I/O Port 0, bits 0-7. Each pin is configured in-
dependently as input or I/O, with or without static pull-up, and with
either open-drain or push-pull output type. The port support inter-
rupt assertion and each pin can be enabled or masked as an inter-
rupt source.
GPIO10
GPIO11-14
GPO15
GPIO16-17
21
53-56
57
69, 71
I/O
INTS/
OD6,O3/6
VDD
General-Purpose I/O Port 1, bits 0-7. Same as Port 0. Bit 5 is
output only with low output as default.
GPIO20-27 117-124 I/O
INTS/
OD6,O3/6
VDD
General-Purpose I/O Port 2, bits 0-7. Similar to port 0, but
without the interrupt assertion capability.
GPIO30-33
GPIO34
125-128
1
I/O
INTS/
OD6,O3/6
VDD
General-Purpose I/O Port 3, bits 0-4. Similar to port 0, but
without the interrupt assertion capability. Bits 5, 6 and 7 are not
implemented.
GPIO40-47 43-50
I/O
INTS/
OD6,O3/6
VDD
General-Purpose I/O Port 4, bits 0-7. Same as Port 0.
Signal
Pin/s
I/O Buffer Type Power Well
Description
IRRX1
59
I
INTS
VDD,VSB
IR Receive 1. Primary input to receive serial data from the IR
transceiver. Monitored during power-off for wake-up event
detection.
IRRX2_IRSL0 58
I/O
INTS/O3/6
VDD,VSB IRRX2 - IR Receive 2. Auxiliary IR receiver input to support a
second transceiver. Monitored during power-off for wake-up event
detection.
IRSL3-0 IR Select. Output are used to control the IR transceivers.
Input for PnP identification of plug-in IR transceiver (dongle).
After reset, the dual-function IRSLX pins wake up in input mode.
After the ID is read by the IR driver, they may be put into output
mode. The output mode is controlled by Serial Port 2.
IRSL1
127
I/O
INT/O3/6
VDD
IRSL2
69
I/O
INT/O3/6
VDD
IRSL3
71
I
INT
VDD
IRTX
57
O
O6/12
VDD
IR Transmit. IR serial output data.



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