STBC02AJR datasheet(8/39 Pages) STMICROELECTRONICS

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Pin configuration (top through view)

STBC02

8/39

DocID029261 Rev 2

Pin configuration (top through view)

Figure 2: Pin configuration top through view

Table 2: Pin description

Bump

name

Description

Power

E5-F5

Input supply voltage. Bypass this pin to ground with a 10

µF capacitor

BAT

A5-B5

Battery positive terminal. Bypass this pin to GND with a

4.7 µF ceramic capacitor

SYS

C5-D5

System output. Bypass this pin to ground with 1 µF

ceramic capacitor

LDO

LDO output. Bypass this pin to ground with 1 µF

ceramic capacitor

NTC

Battery temperature monitor pin

AGND

Analog ground

Connect together with the

same ground layer

GND

GROUND

Programming

ISET

Fast charge current programming resistor

IPRE

Pre-charge current programming resistor

Sensing

BATMS

Battery voltage measurement pin

BATSNS

Battery voltage sensing. Connect as close as possible to

the battery positive terminal

BATSNSFV

Floating voltage sensing. Connect as close as possible

to the battery positive terminal

Digital I/Os

CEN

Charger enable pin. Active high. 500 kΩ internal pull-up

(to LDO)

CHG

Charging/fault flag. Active low (open drain output)

WAKE-UP

Shipping mode exit input pin. Active high. 50 kΩ internal

pull-down

SW_SEL

Load switch selection input (refer to LDO level)

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