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LNBH26LPQR Scheda tecnica(PDF) 8 Page - STMicroelectronics

Il numero della parte LNBH26LPQR
Spiegazioni elettronici  Selectable output current limit by external resistor
PDF  28 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LNBH26LPQR Scheda tecnica(HTML) 8 Page - STMicroelectronics

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Application information (valid for each section A/B)
LNBH26L
8/28
Doc ID 022876 Rev 1
2.9
PNG: input voltage minimum detection
When input voltage (VCC pin) is lower than LPD (low power diagnostic) minimum
thresholds, the PNG I²C bit is set to “1”. Refer to the electrical characteristics table for
threshold details.
2.10
OLF: overcurrent and short-circuit protection and diagnostic
In order to reduce the total power dissipation during an overload or a short-circuit condition,
each section of the device is provided with a dynamic short-circuit protection. It is possible to
set the short-circuit current protection either statically (simple current clamp) or dynamically
through the corresponding PCL bit of the I²C DATA3 register. When the PCL (pulsed current
limiting) bit is set lo LOW, the overcurrent protection circuit works dynamically: as soon as
an overload is detected, the output current is provided for TON time 90 ms and after that, the
output is set in shutdown for a TOFF time of typically 900 ms. Simultaneously, the
corresponding diagnostic OLF I²C bit of the STATUS1 register is set to “1”. After this time
has elapsed, the involved output is resumed for a time TON. At the end of TON, if the
overload is still detected, the protection circuit cycles again through TOFF and TON. At the
end of a full TON in which no overload is detected, normal operation is resumed and the OLF
diagnostic bit is reset to low after register reading is done. Typical TON + TOFF time is 990 ms
and is determined by an internal timer. This dynamic operation can greatly reduce the power
dissipation in short-circuit condition, while still ensuring excellent power-on startup in most
conditions. However, there may be some cases in which a highly capacitive load on the
output can cause a difficult startup when the dynamic protection is chosen. This can be
solved by initiating any power startup in static mode (PCL=1) and, then, switching to the
dynamic mode (PCL=0) after a chosen amount of time depending on the output
capacitance. Also in static mode, the diagnostic OLF bit goes to “1” (and the FLT pin is set to
low) when the current clamp limit is reached and returns low when the overload condition is
cleared and register reading is done.
After the overload condition is removed, normal operation can be resumed in two ways,
according to the OLR I²C bit on the DATA4 register.
If OLR=1, all VSEL bits corresponding to the involved section are reset to “0” and the LNB
section output (VOUT pin) is disabled. To re-enable the output stage, the VSEL bits must be
set again by the microprocessor and the OLF bit is reset to “0” after a register reading
operation.
If OLR=0, the involved output is automatically re-enabled as soon as the overload condition
is removed, and OLF bit is reset to “0” after a register reading operation.
2.11
OTF: thermal protection and diagnostic
The LNBH26L is also protected against overheating: when the junction temperature
exceeds 150 °C (typ.), the step-up converter and both linear regulators are shut off, the
diagnostic OTF bit in the STATUS1 register is set to “1”. After the overtemperature condition
is removed, normal operation can be resumed in two ways, according to the THERM I²C bit
on the DATA4 register.
If THERM=1, all VSEL bits are reset to “0” and both LNB outputs (VOUT pins) are disabled.
To re-enable the output stages, the VSEL bits must be set again by the microprocessor,
while the OTF bit is reset to “0” after a register reading operation.
If THERM=0, outputs are automatically re-enabled as soon as the overtemperature
condition is removed, while the OTF bit is reset to “0” after a register reading operation.



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