SPC56EL54X datasheet(104/165 Pages) STMICROELECTRONICS

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Electrical characteristics

SPC56ELx, SPC564Lx

104/165

DocID15457 Rev 12

3.5.1

General notes for specifications at maximum junction temperature

An estimation of the chip junction temperature, TJ, can be obtained from Equation 1:

Equation 1: TJ = TA + (RJA × PD)

where:

TA= ambient temperature for the package (oC)

RJA= junction to ambient thermal resistance (oC/W)

PD= power dissipation in the package (W)

The junction to ambient thermal resistance is an industry standard value that provides a

quick and easy estimation of thermal performance. Unfortunately, there are two values in

common usage: the value determined on a single layer board and the value obtained on a

board with two planes. For packages such as the PBGA, these values can be different by a

factor of two. Which value is closer to the application depends on the power dissipated by

other components on the board. The value obtained on a single layer board is appropriate

for the tightly packed printed circuit board. The value obtained on the board with the internal

planes is usually appropriate if the board has low power dissipation and the components are

well separated.

When a heat sink is used, the thermal resistance is expressed in Equation 2 as the sum of a

junction to case thermal resistance and a case to ambient thermal resistance:

Table 14. Thermal characteristics for LFBGA257 package(1)

Symbol

Parameter

Conditions

Value

Unit

RJA

Thermal resistance junction-to-ambient natural

convection(2)

Single layer board – 1s

°C/W

Four layer board – 2s2p

RJMA D

Thermal resistance, junction-to-ambient forced

convection at 200 ft/min

Single layer board – 1s

°C/W

Four layer board – 2s2p

RJB

Thermal resistance junction-to-board(3)

—13

°C/W

RJC

Thermal resistance junction-to-case(4)

—8

°C/W

JT

Junction-to-package-top natural convection(5)

—2

°C/W

1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

2. Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets

JEDEC specification for this package.

3. Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification

for the specified package.

4. Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is

used for the case temperature. Reported value includes the thermal resistance of the interface layer.

5. Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written

as Psi-JT.

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