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LQFP100 Scheda tecnica(PDF) 70 Page - STMicroelectronics

Il numero della parte LQFP100
Spiegazioni elettronici  Up to 60 DMIPs operation
PDF  116 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LQFP100 Scheda tecnica(HTML) 70 Page - STMicroelectronics

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Package pinouts and signal descriptions
SPC560B40x/50x, SPC560C40x/50x
70/116
DocID14619 Rev 13
3.19.3
Start-up/Switch-off timings
3.20
Electromagnetic compatibility (EMC) characteristics
Susceptibility tests are performed on a sample basis during product characterization.
3.20.1
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user apply EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
Software recommendations:
The software flowchart must include the management of
runaway conditions such as:
–
Corrupted program counter
–
Unexpected reset
–
Critical data corruption (control registers...)
Prequalification trials:
Most of the common failures (unexpected reset and program
counter corruption) can be reproduced by manually forcing a low state on the reset pin
or the oscillator pins for 1 second.
To complete these trials, ESD stress can be applied directly on the device. When
unexpected behavior is detected, the software can be hardened to prevent
unrecoverable errors occurring (see application note Software Techniques For
Improving Microcontroller EMC Performance (AN1015)).
Table 33. Start-up time/Switch-off time
Symbol
C
Parameter
Conditions(1)
Value
Unit
Min
Typ
Max
TFLARSTEXIT CC
T
Delay for Flash module to exit reset mode
Code Flash
—
—
125
µs
T
Data Flash
—
—
125
TFLALPEXIT
CC
T Delay for Flash module to exit low-power
mode
Code Flash
—
—
0.5
T
Data Flash
—
—
0.5
TFLAPDEXIT
CC
T Delay for Flash module to exit power-down
mode
Code Flash
—
—
30
T
Data Flash
—
—
30
TFLALPENTRY CC
T Delay for Flash module to enter low-power
mode
Code Flash
—
—
0.5
T
Data Flash
—
—
0.5
TFLAPDENTRY CC
T
Delay for Flash module to enter power-
down mode
Code Flash
—
—
1.5
T
Data Flash
—
—
1.5
1.
VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified



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