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ST7LITEUS2 Scheda tecnica(PDF) 13 Page - STMicroelectronics |
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ST7LITEUS2 Scheda tecnica(HTML) 13 Page - STMicroelectronics |
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13 / 136 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) ST7LITEUS2, ST7LITEUS5 Pin description 13/136 Figure 4. 16-pin package pinout 1. Reserved pins must be tied to ground. 2. The differences versus the 8-pin packages are listed below: The I2C signals (ICCCLK and ICCDATA) are mapped on dedicated pins. The RESET signal is mapped on a dedicated pin. It is not multiplexed with PA3. PA3 pin is always configured as output. Any change on multiplexed IO reset control registers (MUXCR1 and MUXCR2) will have no effect on PA3 functionality. Refer to Section 6.5: Register description on page 37. Reserved 1) VDD ICCCLK NC VSS PA1 (HS) / AIN1 PA0 (HS) / AIN0 / ATPWM RESET 1 2 3 4 1 1 1 1 ei4 ei3 ei1 ei0 PA5 (HS) / AIN4 / CLKIN PA4 (HS) / AIN3/MCO NC NC ICCDATA NC PA2 (HS) / LTIC / AIN2 PA3 5 7 6 8 12 11 10 9 ei2 Obsolete Product(s) - Obsolete Product(s) |
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