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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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STA321MPL1TR Scheda tecnica(PDF) 44 Page - STMicroelectronics |
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STA321MPL1TR Scheda tecnica(HTML) 44 Page - STMicroelectronics |
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44 / 80 page  Registers STA321MPL1 44/80 DocID029389 Rev 1 In AC mode, the attack and release thresholds are set relative to full-scale. In DRC mode, the attack threshold is set relative to the maximum volume setting of the channels mapped to that limiter and the release threshold is set relative to the maximum volume setting plus the attack threshold. Figure 8. Basic limiter and volume flow diagram CnLS[1,0] Channel limiter mapping 00 Channel has limiting disabled 01 Channel is mapped to limiter #1 10 Channel is mapped to limiter #2 LnA[3:0] Attack rate (dB/ms) 0000 3.1584 (fast) 0001 2.7072 0010 2.2560 0011 1.8048 0100 1.3536 0101 0.9024 0110 0.4512 0111 0.2256 1000 0.1504 1001 0.1123 1010 0.0902 1011 0.0752 1100 0.0645 1101 0.0564 1110 0.0501 1111 0.0451 (slow) |
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