L9658 datasheet(42/64 Pages) STMICROELECTRONICS

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Functional description

L9658

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Doc ID 14219 Rev 3

Bit D12 used to reflect the status of MOSI Read/Write bit.

Bit D11 used to reflect the MOSI bit D11 in the previous command.

Bit D10 is used to indicate the deployment condition set in L9658. Refer to section 5.10.2 for

deployment condition bit in MOSI register mode message.

Bit D9 and bit D8 used to report the period of the pulse stretch timer.

Bit D1 shall be used to indicate a "hard-reset" event. This bit shall be de-asserted ('0'), when

POR is detected, RESETB is asserted, RIREF is out-of-range, or GND connection is lost.

This bit shall be set to '1,' after the bit has been read. A soft reset sequence shall not affect

this bit.

Bit D0 used to report the soft reset sequence status. If valid soft reset sequences are

received, bit D0 is set to ‘1.’ Otherwise, bit D0 is set to ‘0.’

When L9658 receives valid soft reset sequences, it will send MISO register mode response

containing $0001 in the next SPI transmission.

4.12

MISO register mode response summary

Table 24 below summarizes the MISO register mode response of various events and MOSI

messages. The MOISO response shown here is the one received in the next valid SPI

transmission after each event or MOSI write.

Table 25.

MISO register mode response summary

Event/MOSI message

MISO response

POR

$0000

RESETB

$0000

LOSS OF gnd

$0000

RIREF out of range

$0000

MOSI Write Soft Reset: $AA

$1X02

MOSI Write Soft Reset: $55 (after $AA)

$0003

MOSI Write Pulse Stretch Timer

$1X02

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