T48C862-R4 datasheet(39/107 Pages) ATMEL

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T48C862-R4 [Preliminary]

4551C–4BMCU–01/04

Port 6 Data Register (P6DAT)

Primary register address: "6"hex

Port 6 Control Register (P6CR)

Auxiliary register address: "6"hex

P6xM2, P6xM1 – Port 6x Interrupt mode/direction code

Table 13.

Port 6 Control Register

Universal Timer/Counter/

Communication Module

(UTCM)

The Universal Timer/counter/Communication Module (UTCM) consists of three timers

(Timer 1,Timer 2, Timer 3) and a Synchronous Serial Interface (SSI).

•

Timer 1 is an interval timer that can be used to generate periodical interrupts and as

prescaler for Timer 2, Timer 3, the serial interface and the watchdog function.

•

Timer 2 is an 8/12-bit timer with an external clock input (T2I) and an output (T2O).

•

Timer 3 is an 8-bit timer/counter with its own input (T3I) and output (T3O).

•

The SSI operates as two wire serial interface or as shift register for modulation and

demodulation. The modulator and demodulator units work together with the timers

and shift the data bits into or out of the shift register.

There is a multitude of modes in which the timers and the serial interface can work

together.

Bit 3Bit 2Bit 1Bit 0

P6DAT3

–

P6DAT0

Reset value: 1xx1b

Bit 3Bit 2Bit 1Bit 0

P63M2

P63M1

P60M2

P60M0

Reset value: 1111b

Auxiliary Address: "6"hex

Write Cycle

Code

3 2 1 0

Function

Code

3 2 1 0

Function

x x 1 1

BP60 in input mode

1 1 x x

BP63 in input mode

x x 1 0

BP60 in output mode

1 0 x x

BP63 in output mode

x x 0 x

BP60 enable alternate port

function (T3O for Timer 3)

0 x x x

BP63 enable alternate port

function (T3I for Timer 3)

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