ST6380 datasheet(45/82 Pages) STMICROELECTRONICS

45 / 82 page

45/82

ST6380, ST6381, ST6382, ST6383, ST6388, ST6389

4.5 6-BIT PWM D/A CONVERTERS

The D/A macrocell contains up to six PWM D/A

outputs (31.25kHz repetition, DA0-DA5) with six

bit resolution.

Each D/A converter of ST638x is composed by the

following main blocks:

– pre-divider

– 6-bit counter

– data latches and compare circuits

The pre-divider uses the clock input frequency

(8MHz typical) and its output clocks the 6-bit free-

running counter. The data latched in the six regis-

ters (E0h, E1h, E2h, E3h, E6h and E7h) control

the six D/A outputs (DA0,1,2, 3, 4 and 5). When all

zeros are loaded the relevant output is an high log-

ic level; all 1's correspond to a pulse with a 1/64

duty cycle and almost 100% zero level.

The repetition frequency is 31.25kHz and is relat-

ed to the 8MHz clock frequency. Use of a different

oscillator frequency will result in a different repeti-

tion frequency. All D/A outputs are open-drain with

standard current drive capability and able to with-

stand up to 12V.

DA0-DA5 Data/Control Register (DADCR)

Address: E0h, E1h, E2h, E3h, E6h, E7h, - Write

only

Reset Value: XXh

Caution:

This register contains at least one write

only bit. Single bit instructions (SET, RES, INC

and DEC) should not be used.

DADCR0-DADCR5. These are the 6 bits of the

PWM digital to analog converter. Undefined after

reset.

Figure 30. 6-bit PWM D/A Output Configuration

DADCR

DA0-DA5

Out

OUT

VA00343

(OPEN-DRAIN, 12V)

ST6380 Scheda tecnica(PDF) 45 Page - STMicroelectronics

ST6380 Scheda tecnica(HTML) 45 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

Scheda tecnica Scarica

Link URL