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VIPER15 Scheda tecnica(PDF) 19 Page - STMicroelectronics |
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VIPER15 Scheda tecnica(HTML) 19 Page - STMicroelectronics |
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19 / 40 page ![]() VIPER15 Operation description Doc ID 15455 Rev 5 19/40 7.4 Power-down description At converter power-down, the system loses regulation as soon as the input voltage is so low that the peak current limitation is reached. The VDD voltage drops and when it falls below the VDDoff threshold the power MOSFET is switched OFF, the energy transfers to the IC is interrupted and consequently the VDD voltages decreases, see Figure 23 on page 17. Later, if the VIN is lower than the threshold VDRAIN_START, the start-up sequence is inhibited and the power-down completed. This feature is useful to prevent converter’s restart attempts and ensures monotonic output voltage decay during the system power-down. 7.5 Auto-restart description If after a converter power-down, the VIN is higher than VDRAIN_START, the power-up sequence is not inhibited and will be activated only when the VDD voltage drops down the VDD(RESTART) threshold (reported on Table 7 on page 7). This means that the HV start-up current generator restarts the VDD capacitor charging only when the VDD voltage drops below VDD(RESTART). The scenario above described is for instance a power-down because of a fault condition. After a fault condition, the charging current, IDDch, is reduced to 0.6 mA instead of 3 mA of the normal power-up converter phase. This feature together with the low VDD(RESTART) threshold (reported on Table 7 on page 7) ensures that, after a fault, the restart attempts of the IC has a very long repetition rate and the converter works safely with extremely low power throughput. The Figure 26 shows the IC behavioral after a short-circuit event. Figure 26. Timing diagram: behavior after short-circuit I DD V DD V DS V DDon time Short circuit occurs here V DDoff V DD(RESTART) I DDch (0.6mA) time time time V FB V FBolp V FBlin T REPETITION 0.3 x T REPETITION Obsolete Product(s) - Obsolete Product(s) |
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