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R5F564MLDDFC Scheda tecnica(PDF) 216 Page - Renesas Technology Corp |
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R5F564MLDDFC Scheda tecnica(HTML) 216 Page - Renesas Technology Corp |
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216 / 228 page ![]() R01DS0173EJ0110 Rev.1.10 Page 216 of 228 Oct 24, 2016 RX64M Group 5. Electrical Characteristics 5.12 Boundary Scan Figure 5.86 Boundary Scan TCK Timing Figure 5.87 Boundary Scan TRST# Timing Table 5.55 Boundary Scan Characteristics Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0, VCC_USBA = AVCC_USBA = 3.0 to 3.6 V, VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V, Ta = Topr Output load conditions: VOH = VCC × 0.5, VOL = VCC × 0.5, C = 30 pF High-drive output is selected by the driving ability control register. Item Symbol Min. Typ. Max. Unit Test Conditions TCK clock cycle time tTCKcyc 100 ―― ns Figure 5.86 TCK clock high pulse width tTCKH 45 ―― ns TCK clock low pulse width tTCKL 45 ―― ns TCK clock rise time tTCKr ―― 5ns TCK clock fall time tTCKf ―― 5ns TRST# pulse width tTRSTW 20 ―― tTCKcyc Figure 5.87 TMS setup time tTMSS 20 ―― ns Figure 5.88 TMS hold time tTMSH 20 ―― ns TDI setup time tTDIS 20 ―― ns TDI hold time tTDIH 20 ―― ns TDO data delay time tTDOD ―― 40 ns TCK tTCKcyc tTCKH tTCKf tTCKL tTCKr RES# TRST# TCK tTRSTW |
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