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R5F564MLGDLC Scheda tecnica(PDF) 65 Page - Renesas Technology Corp

Il numero della parte R5F564MLGDLC
Spiegazioni elettronici  120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 4-MB flash memory
PDF  228 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F564MLGDLC Scheda tecnica(HTML) 65 Page - Renesas Technology Corp

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R01DS0173EJ0110 Rev.1.10
Page 65 of 228
Oct 24, 2016
RX64M Group
2. CPU
2.
CPU
Figure 2.1 shows register set of the CPU.
Figure 2.1
Register Set of the CPU
Note 1. The stack pointer (SP) can be the interrupt stack pointer (ISP) or user stack pointer (USP), according to
the value of the U bit in the PSW.
R15
R14
R13
R12
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0 (SP)
*1
General-purpose register
b31
b0
DSP instruction register
b71
b0
ACC0 (Accumulator 0)
ACC1 (Accumulator 1)
USP (User stack pointer)
ISP (Interrupt stack pointer)
INTB (Interrupt table register)
PC (Program counter)
PSW (Processor status word)
BPC (Backup PC)
BPSW (Backup PSW)
FINTV (Fast interrupt vector register)
FPSW (Floating-point status word)
Control register
b31
b0
EXTB (Exception table register)



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